High-performance Multiplexer-based Logic Synthesis Using Pass-transistor Logic
نویسندگان
چکیده
منابع مشابه
Performance Driven Synthesis for Pass-Transistor Logic
For many digital designs, implementation in passtransistor logic (PTL) has been shown to be superior in terms of area, timing, and power characteristics to static CMOS. Binary Decision Diagrams (BDDs) have been used for PTL synthesis because of the close relationship between BDDs and PTL. Thus far, BDD optimization for PTL synthesis has targeted minimizing the number of BDD nodes. This strategy...
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Pass Transistor Logic (PTL) circuits have been successfully used to implement digital ICs which are smaller, faster, and more energy efficient that static CMOS implementations of the same designs. Thus far, most PTL implementations have been handcrafted; as such, designer acceptance of PTL has been limited. In this paper, we develop efficient algorithms for automated synthesis of high quality P...
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In this paper, we address the problem of layout generation of pass transistor logic (PTL) circuits from binary decision diagrams (BDD’s) by laying out groups of transistors in rows. We use a max-flow min-cut based recursive bipartitioning procedure followed by a greedy heuristic to assign the BDD nodes to rows, such that the number of wires to be routed across the rows is minimized. Next, we us...
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ژورنال
عنوان ژورنال: VLSI Design
سال: 2002
ISSN: 1065-514X,1563-5171
DOI: 10.1080/1065514021000054736